Linux/Kernel/PCIDynamicResourceAllocationManagement: Kconfig.pci-dram

File Kconfig.pci-dram, 8.3 KB (added by tj, 9 years ago)

Kernel CONFIG file for PCI-Dynamic Resource Allocation Management

1# PCI Dynamic Resource Allocation Management
3config PCI_DRAM
4        bool "PCI Dynamic Resource Allocation Management"
5        depends on PCI && EXPERIMENTAL
6        default n
7        help
8          Enable support for alternative PCI memory-mapped resource allocation policies.
9          Depending on the options selected, resources can be allocated in all
10          unused areas of the address space. This allows Linux to assign PCI MEM
11          resources flexibly and vary the strategy in several ways.
16        prompt "Predefined DRAM Policy"
17        default PCI_DRAM_POLICY_LEGACY
18        help
19          Select one of several PCI MEM resource allocation policies. These make
20          it easier and safer for the user to choose tried and tested configurations
21          rather than work with individual options.
24        bool "Use the original legacy allocation policy"
25        help
26          Uses the single largest available region and creates a safety net between
27          top of RAM and bottom of PCI MEM region. When this is set the MEM
28          allocation strategy is the same as it was in all pre-2.6.26 kernels.
31        bool "Use the preferred Linux allocation policy"
32        help
33          Detects free address ranges using the most reliable and comprehensive
34          methods, organises regions so they are efficiently used, allocates resources
35          within regions using a best-fit strategy, and shuffles resource allocations
36          around when devices are added or removed to prevent fragmentation of resources.
38config  PCI_DRAM_POLICY_WIN2003
39        bool "Use the Windows XP/2003 allocation policy"
40        depends on X86
41        help
42          Uses all available regions below 4GB. Maps 64-bit capable devices below
43          the 4GB boundary unless there is no space, in which case the device is
44          mapped above 4GB *but is inoperable* on 32-bit versions of the OS.
46config  PCI_DRAM_POLICY_WIN2006
47        bool "Use the Windows Vista/2008 allocation policy"
48        depends on X86
49        help
50          Uses all available regions below 4GB. Maps 64-bit capable devices above
51          the 4GB boundary, using PAE on 32-bit CPUs that support it. For bridges
52          above 4GB, all devices must support pre-fetchable BARs.
57        int "Verbosity of log messages (0 - 10)"
58        range 0 10
59        default 4
60        help
61         While experimenting it is helpful to see how the allocation strategy is
62         being implemented. Increase this value to cause more detailed log
63         messages.
66        bool "Additional log messages for tracing and debugging"
67        default n
68        help
69          When enabled extensive additional log messages are generated to assist
70          in monitoring the allocation policy configuration and operation.
73        bool "Configure custom resource allocation policy"
74        default n
75        help
76          Set individual flags in the configuration settings.
81        int "Maximum number of regions to use (0-255)"
82        range 0 255
83        default 0
84        help
85          The default is 0 which allows all regions to be used. A non-zero value
86          sets the maximum number of regions used. For example, if 12 regions
87          are discovered and this value is 5, only the first 5 will be used for
88          PCI MEM resources. The remainder will be unused. The order of
89          regions in the list is controlled by other options so the effect of this
90          option needs to be considered alongside those.
93        bool "Sort regions list"
94        default n
95        help
96          If left unsorted ([n]o) the regions are in the order they were discovered when
97          the BIOS e820 map was scanned. When sorted ([y]es) the list head has the
98          largest region and the list tail has the smallest. By enabling sorting, and
99          using it in conjunction with PCI_DRAM_REGIONS_DIR, the efficiency of the
100          allocation strategy is controlled.
103        bool "Traverse the regions list first-to-last"
104        default n
105        help
106         When looking for space to allocate to a device or bridge the regions list
107         is searched in the direction set by this option. The default is [n]o, which
108         will traverse the list last-to-first. To traverse first-to-last set to [y]es.
109         When this option is set to [n]o and combined with PCI_DRAM_REGIONS_SORT=y
110         this enables the allocation strategy to efficiently allocate resources.
111         For example, video chip-sets that require large IOMEM allocations
112         (typically 256MB) benefit if the search direction is smallest-to-largest
113         since all other allocations should be satisfied by smaller regions, leaving
114         the largest region for the video chip-set.
117        bool "Allocate resources top-down"
118        default n
119        help
120          When a bridge or device has found a region large enough to satisfy its
121          requirement, it will request the allocation. This option controls which
122          'end' of the region the allocation is anchored to. When set to [n]o the
123          allocation is made using the lowest free address range (bottom-up).
124          If set to [y]es (top-down) it is made using the highest free address range.
125          For example, in a region from 0xC0000000 to 0xD0000000, an allocation
126          of 128MB (0x08000000) will be 0xC0000000-0xC8000000 when the option is [n]o,
127          and 0xC8000000-0xD0000000 when the option is [y]es.
130        bool "Dynamic Resource Allocation for Bridges"
131        default n
132        help
133         Allows the resource allocation of a bridge to be resized and/or moved when
134         devices behind the bridge are added or removed. This requires that all the
135         device drivers of the devices behind the bridge support DRA pause so the
136         resource allocation of each subsidiary device can safely be moved.
139        bool "Dynamic Resource Allocation for Devices"
140        default n
141        help
142         Allows the resource allocation of a device to be moved when other devices
143         behind the same bridge are added or removed. This ensures that the
144         combined allocation within the bridge's space remains contiguous.
145         This requires that the device driver supports DRA pause so the resource
146         allocation can safely be moved.
148config PCI_DRAM_LIMIT_4GB
149        bool "Force 64-bit BARs to be allocated below the 4GB boundary"
150        default n
151        depends on 64BIT
152        help
153          When set to [n]o 64-bit capable devices will be allocated above the 4GB
154          boundary if the system supports addressing more than 32-bits. When set
155          to [y]es this forces 64-bit capable devices to be allocated below the 4GB
156          boundary or to not receive an allocation.
157          In some 64-bit systems with 64-bit capable PCI devices the north-bridge
158          chip-set cannot address more than 32-bits. This option ensures in that
159          situation that the device receives an allocation where it might usually
160          be allocated resources above 4GB which would be unreachable.
163        bool "Impose safety net (gap) between RAM and PCI MEM"
164        default n
165        help
166          When set to [n]o the lowest MEM region can be contiguous with the top of
167          RAM. When set to [y]es an artificial gap is created by shrinking the size of
168          the lowest region and moving its start to a higher address.
169          This will ensure that in circumstances where the memory map doesn't report all
170          used ranges, or shared video memory is present, that PCI MEM doesn't accidentally
171          overlap the used range (which is usually at top of RAM).
173config PCI_DRAM_SCAN_E820
174        bool "Use BIOS Int 0x15 eax=0xE820 map in determining PCI MEM regions"
175        default y
176        depends on X86
177        help
178          Treat the BIOS-reported memory region usage as authoritative when looking
179          for free address ranges for use by PCI IOMEM.
182        bool "Use ACPI in determining PCI MEM regions"
183        default n
184        depends on ACPI
185        help
186          Treat the ACPI-reported memory regions usage as authoritative when looking
187          for free address ranges for use by PCI MEM.
189config PCI_DRAM_FLAGS
190        hex "Allocation strategy flags"
191        range 0x0 0x7FFFFFFF
192        default  "0x80000000"
193        help
194          Combination of bit flags controlling PCI MEM resource allocation strategy.
195          bit 0-7 = Maximum number of regions to use
196          bit  8  = Sort regions list
197          bit  9  = Traverse the regions list first-to-last
198          bit 10  = Allocate resources top-down
199          bit 12  = Dynamic Resource Allocation for Bridges
200          bit 13  = Dynamic Resource Allocation for Devices
201          bit 16  = Force 64-bit BARs to be allocated below the 4GB boundary
202          bit 17  = Impose safety net (gap) between RAM and MEM
203          bit 24  = Scan BIOS e820 memory map to detect gaps
204          bit 25  = Scan ACPI OperationRegions to detect gaps
206          The default value (0x80000000) is a special marker value that is thrown away
207          without the CONFIG flags being applied.